D.4.2 Overview of Preemptible RCU Algorithm
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D.4.2 Overview of Preemptible RCU Algorithm

This section focuses on a specific implementation of preemptible RCU. Many other implementations are possible, and are described elsewhere [MSMB06,MS05]. This article focuses on this specific implementation's general approach, the data structures, the grace-period state machine, and a walk through the read-side primitives.

Subsections

- D.4.2.1 General Approach
- D.4.2.2 Data Structures
  - D.4.2.2.1 `rcu_ctrlblk`
  - D.4.2.2.2 `rcu_data`
  - D.4.2.2.3 `rcu_flipctr`
  - D.4.2.2.4 `rcu_try_flip_state`
  - D.4.2.2.5 `rcu_try_flip_flag`
  - D.4.2.2.6 `rcu_mb_flag`
- D.4.2.3 Grace-Period State Machine
  - D.4.2.3.1 Grace-Period State Machine Overview
  - D.4.2.3.2 Grace-Period State Machine Walkthrough
- D.4.2.4 Read-Side Primitives
  - D.4.2.4.1 `rcu_read_lock()`
  - D.4.2.4.2 `rcu_read_unlock()`
  - D.4.2.4.3 Memory-Barrier Considerations